The present invention generally relates to charged particle beam lithography and more particularly to a charged particle beam lithography system suitable for writing a semiconductor pattern on a semiconductor wafer and a method of writing such a pattern at a high speed.
With the continuous demand to increase the integration density of integrated circuits, new lithography technique such as electron beam lithography or X-ray lithography is now under intensive study. Some of them are already in use.
In the case of the electron beam lithography, an extremely fine patterning according to the micron- or submicron-rule is possible by using a focused electron beam having an extremely small beam spot which may have a diameter of one micron or less. Conventionally, a so-called Gaussian beam having a circular beam spot with the Gaussian distribution for the electron intensity in the beam or a so-called shaped beam having a shaped beam cross section, which may be rectangular or triangular for example, is used while moving a stage supporting a wafer continuously or stepwise. In any of these techniques, however, there is a limitation in the speed of patterning because of the essential nature of the electron beam lithography in which the pattern is written on the wafer by the electron beam in "one stroke".
In the electron beam lithography, there is a problem in that the number of shots is increased when an electron beam having a small beam diameter is used and as a result, there arises a problem that a long time is needed when exposing or filling a large area of the wafer. For example, one hundred shots are needed when exposing a square pattern having a size of 10 .mu.m.times.10 .mu.m by an electron beam having a square cross section with a beam size of 1 .mu.m.times.1 .mu.m. When the beam size is 0.5 .mu.m .times.0.5 .mu.m, on the other hand, four hundred shots becomes necessary. Associated therewith, the throughput of the patterning is further deteriorated.
In order to avoid the foregoing problem of excessive increase in the number of shots, a system shown in FIG. 1 is conventionally used in which an electron beam produced by an electron gun 1 is deflected by an electrostatic deflector 4 after passing through a shaping aperture 2 and an electromagnetic lens 3 such that the electron beam selectively falls on a designated pattern 6a provided on a stencil mask 5 in a form of aperture having a predetermined shape corresponding to the elementary pattern of the semiconductor device to be patterned. After passing through the mask 5, the electron beam now having a shape corresponding to the selected pattern 6a is focused on a wafer 7 by electron lenses 8 and 9. On the mask 5, there is further provided a rectangular or triangular aperture 6b and the cross section of the electron beam can be changed as desired by directing the electron beam to hit at least a part of the aperture 6b by controlling the electrostatic deflector 4. By controlling the deflector 4 such that only a small part of the electron beam is passed through the aperture 6b, the size of the electron beam is reduced. When the deflector 4 is controlled such that a large part of the electron beam is passed through the aperture 6b, the size of the electron beam is increased.
FIG. 2(A) shows a typical prior art mask 5 in more detail. The mask 5 generally comprises a silicon base body 5a on which a plurality of regions 6 are defined, wherein the predetermined patterns such as patterns 6a.sub.-1 -6a.sub.-3 are formed in the region 6 in a form of the aperture as is clearly seen from the cross sectional view of FIG. 2(B). Note that the regions 6 are defined within an area 5b of the mask which can be addressed by the deflection of the electron beam B. Further, there is provided a single large cutout corresponding to the aperture 6b in one of the regions 6 as shown in FIG. 2(A) for variable shaping of the electron beam B.
After the foregoing shaping of the electron beams, the beam B having a desired cross section is moved over the wafer 7 by a deflection system (not shown) provided above the wafer 7 and a semiconductor pattern 7a comprising a repetition of patterns such as the pattern 6a.sub.-3 and the like is written as a result of the movement of the beam B relative to the wafer 7 as shown in FIG. 2(C). In FIG. 2(C), a marginal area written on the wafer 7 is represented as an area 7b.
Such electron beam lithography using the mask is effective in patterning a semiconductor device particularly when the device comprises a repetition of a limited number of fundamental or elementary patterns such as dynamic random access memory (DRAM). Thus, there are proposed a number of variations based on this technique as described in the Japanese Laid-open Patent Application No. 52-119185 in which the fundamental patterns are arranged on the mask in a row and column formation or as in the Japanese Laid-open Patent Application No. 62-260322 in which the designed patterns and the aperture for the variable shaping of the electron beam are provided on a diaphragm.
In the foregoing electron beam lithography system, it should be noted that the electrostatic deflector 4 is used to deflect the electron beam. As the electrostatic deflector has a response time of about 0.1-1 usec, the system can change the size and shape of the spot of the electron beam quickly between one shot and a next shot. However, the electrostatic deflector cannot produce a large beam deflection because of the practical limitation in the voltage applicable across a pair of electrodes forming the deflector. When an excessive voltage is applied to the electrostatic deflector, there is a substantial risk that an electrical discharge is established between the electrodes and the control of the electron beam is lost. Thus, the deflection angle which can be obtained by the electrostatic deflector is limited and associated therewith, there is a problem in that the number of patterns which can be selected on the mask is limited.
Further, the prior art system of FIG. 1 has a problem in that the electron lens 8 has a spherical abberation and an image formed on the wafer 7 in correspondence to the spot of the electron beam passed through the designed pattern tends to be blurred when the selected pattern is located at a marginal area far from the optical axis of the electron lens 8.
Furthermore, there is another problem in the prior art system in that the image focused on the wafer 7 by the electron beam is undesirably demagnified. Referring to FIG. 3 showing a part around the lens 8 in an enlarged scale, the electron beam incident to the lens 8, which may comprise a first lens 8a and a second lens 8b as shown in the drawing, obliquely along a first path A (referred to as a beam A) is spread relative to the electron beam incident perpendicularly to the lens 8 along a second path B passing straight through the center of the lens (referred to as a beam B). As a result, a relatively large proportion of the electron beam A is stopped by the designed pattern 6a as compared to the beam B, which is interrupted by the pattern 6b, even when the size of the aperture is identical in the pattern 6a and the pattern 6b. When the electron beams thus shaped by the mask 5 is focused by the second lens 8b at a crossover point C, the angular aperture for the electron beam A becomes smaller than the that of the electron beam B and the image of the pattern focused on the wafer 7 by the beam A is undesirably compressed or demagnified.